Papers
Number of the published data : 14
No. Publishing type Authorship Title Author Journal Publisher Volume/issue/page Publication date ISSN DOI URL Summary
1 Research paper (scientific journal)
Joint
Instructional Scaffolding for ASIP Design Education with System Verilog Assetion considering Situated Nature of Learning
Ryuichi TAKAHASHI and Yoshiyasu TAKEFUJI
International Jpurnal of Computer Science and Network Security

Vol.16/ No.10, 116-121
2016/10/30
1738-7906



2 Research paper (international conference proceedings)
Joint
SystemVerilog Assertion for Microarchitecture Education considering Situated Nature of Learning: A Senior Project
Ryuichi TAKAHASHI and Yoshiyasu TAKEFUJI
IEEE Proc. MSE 2011: International Conference on Microelectronic Systems Education

112-113
2011/06




3 Research paper (scientific journal)
Joint
A Fine Grain Microprocessor Design Education considering Situated Nature of Learning
Ryuich TAKAHASHI´╝î Hajime OHIWA and Yoshiyasu TAKEFUJI
International Journal of Computer Science and
Network Security

8/ 6, 194-198
2008/06




4 Research paper (international conference proceedings)
Joint
CS Education for High School Students
Focusing on Energy Consumption on FPGA
Ryuici TAKAHASHI, Kenta KANDA, Yuji KIHARA, Hajime OHIWA
Supplementary Proc.15th International Conference on
Computers in Education

39-40
2007/11




5 Research paper (scientific journal)
Joint
Situated Learning for Fine Grain Microcomputer Design Education
Ryuichi TAKAHASHI, Hajime OHIWA
Journal of JSEE

54/ 2, 55-61
2006/03




6 Research paper (international conference proceedings)
Joint
Legitimate Peripheral Participation on FPGA for Fine Grain Microprocessor Design Education
Ryuichi TAKAHASHI and Hajime OHIWA
IEEE Proc. MSE 2005 International Conference on Microelectronic Systems Education

99-100
2005/06




7 Research paper (international conference proceedings)
Joint
Situated Learning on FPGA for Superscalar Microprocessor Design Education
Ryuichi TAKAHASHI, Hajime OHIWA
IEEE 16th Symposium on Integrated Circuits and Systems Design

243-248
2003/09




8 Research paper (international conference proceedings)
Joint
Diagonal Examples for Design Space Exploration in an Educational Environment City-1
Ryuichi TAKAHASHI and Noriyoshi YOSHIDA
IEEE Proc. MSE 1999 International Conference on Microelectronic Systems Education

71-73
1999/07




9 Research paper (scientific journal)
Joint
Design Education for Intelligent Digital Systems Creation
Ryuichi TAKAHASHI,Noriyoshi YOSHIDA
The Journal of the Institute of Electronics,Information and Communication Engineers

81/ 9, 908-912
1998/09




10 Research paper (scientific journal)
Joint
Logic Circuit Design for Testability Using Orthonormal Expansion
Ryuichi TAKAHASHI, Takashi NANYA
Systems and Computers in JAPAN

26/ 11, 1-11
1995/11




11 Research paper (international conference proceedings)
Joint
Multilevel Logic Design for Testability using Orthonormal Expansions
Ryuichi TAKAHASHI,Takashi NANYA
ACM, IEEE Proc International Workshop on Logic Synthesis

6.41-6.46
1995/05




12 Research paper (scientific journal)
Joint
A Note on Logic Circuit Design for Testability Using Orthonormal Expansions
Ryuichi TAKAHASHI, Takashi NANYA
Transactions on Information and Systems, PT.1

J77-D-I/ 12, 785-793
1994/12




13 Research paper (scientific journal)
Joint
Strategies for High Level Synthesis
Ryuichi TAKAHASHI,Takeshi YOSHIMURA
Transactions on Fundamentals of Electronics, Communications and Computer Sciences

J74-A/ 2, 143-151
1991/02




14 Research paper (international conference proceedings)
Joint
A VLSI Architecture Evaluation System
Ryuichi TAKAHASHI,Takeshi YOSHIMURA,Satoshi GOTO
ACM, IEEE Proc. International Conference on Computer Design

60-63
1986/10